Workplace
hybrid
Employment
Full-Time
Published
Aug 24, 2026
Closes
No date supplied
The role
About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role You will work on the systems software strategy and execution that brings new AI silicon from first power-on to a fully integrated system running production-representative models at expected functionality and performance. You will define how software exercises and validates compute, memory, interconnect, and I/O subsystems, then build the diagnostics, automation, and observability needed to find issues quickly. This role sits at the center of silicon, firmware, platform, systems, and workload teams. You will turn hardware specifications and performance targets into an end-to-end bringup plan, drive cross-functional debug, and establish the stress and regression infrastructure that makes each new platform reliable across operating environments. In this role, you will: - Contribute to the end-to-end software bringup and validation strategy for new silicon and first-party systems. - Define software-driven test coverage across compute, memory, interconnect, I/O, and their system-level interactions. - Build diagnostics, test automation, telemetry, and regression infrastructure that accelerate first-silicon learning and issue isolation. - Lead bringup from initial silicon arrival through board and system integration, docking, runtime enablement, and model execution. - Design stress tests that characterize reliability, performance, and stability across workloads and operating conditions. - Translate architecture specifications and performance models into measurable acc
Requirements
Department: Scaling; Team: Hardware