Primary record

Sr. Engineer, Package Design

Tenstorrent Indexed employerSanta Clara, California, United States · Toronto, Ontario, Canada
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Workplace

hybrid

Employment

Other

Published

Aug 11, 2026

Closes

No date supplied

The role

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

We are seeking a designer to create board-level routing studies, design mock-ups, and SI/PI modeling collateral that support advanced semiconductor package development. This role is focused on early-stage package/board co-design rather than production PCB release. The designer will work closely with signal integrity, power integrity, mechanical, and system teams to develop representative PCB routing environments for BGA optimization, package escape studies, and system-level electrical modeling.

This role is hybrid, based out of Santa Clara, California, Austin, Texas, Toronto Canada or New Taipei City, Taiwan.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• An experienced PCB designer looking to expand into advanced semiconductor packaging and package-board co-design.

• Comfortable working in ambiguous problem spaces and using engineering judgment to evaluate multiple implementation tradeoffs.

• Interested in understanding how package architecture, BGA design, and board implementation influence overall system perfo

Requirements

Department: Silicon: Packaging