Primary record

Signal Integrity Engineer

OpenAI Indexed employerSan Francisco
Source-hosted applyChecked 3h ago$225K–$445K/yrFull-Time
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Workplace

On-site

Employment

Full-Time

Published

Jan 22, 2026

Closes

No date supplied

The role

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for signal integrity (SI) system design engineers who have a deep expertise in the SI area, and hold strong system level design knowledge This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: - Lead system signal integrity (SI) design for AI supercomputer product in the data center application. - Collaborate with chip, package, boards, rack and system engineers, design partners to drive system SI design and develop innovative interconnect and high-speed technologies - Identify and evaluate new technologies and methodologies to improve signal and power integrity in product design, and contribute to the development of new products and technology by providing expertise in signal integrity - Perform simulation and modeling to identify and troubleshoot signal integrity issues - Lead system interconnect design, bring up and qualification - As the scope of the role and team grows, understand and influence roadmaps for hardware partners for our datacenter networks, racks, and buildings. You might thrive in this role if you: - Have at least 10 years of industry experience, including experience design hardware system and SerDes testing for data center applications - Have a strong bias toward action, and won’t take no for an answer. - Have experience and good knowledge of system design experience in the SI areas, from chip, SerDes, board,

Requirements

Department: Scaling; Team: Hardware