Primary record

Principal CPU Microarchitect - RISC-V & AI Compute

Tenstorrent Indexed employerAustin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada · Austin, Texas, United States
Source-hosted applyChecked 5h agoOther
Apply at Tenstorrent

Tenstorrent receives this application through Greenhouse. Babu Careers does not claim delivery.

Workplace

hybrid

Employment

Other

Published

Aug 11, 2026

Closes

No date supplied

The role

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

Our Tensix Team is building the future of AI compute with a ground-up architecture centered on scalable RISC-V processors. As we push performance boundaries, we’re reimagining the frontend of our RISC-V cores to deliver major gains in programmability, efficiency, and developer experience. This is a rare opportunity to shape the CPU architecture at the heart of our AI platform and lead one of the most strategic technical efforts at Tenstorrent.

This role is hybrid, based out of Toronto, ON, Austin, TX or Santa Clara, CA.

We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• Experienced Microarchitect: 10+ years of deep expertise in CPU performance modeling and microarchitecture design.

• AI Workload Expert: Deeply familiar with the computational and memory bottlenecks of modern AI workloads, particularly Large Language Models (LLMs).

• Hardware-Software Co-Designer: Driven to architect custom instruction set extensions and validate their performance gains against real-world workloads.

• <strong

Requirements

Department: AI Hardware: Tensix