Physical Design Engineer

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. Cerebras works with the leading model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership https://openai.com/index/cerebras-partnership/ with Cerebras, to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. About The Role As a member of our tight knit physical design team, you will be working on the design and analysis of 3D integrated products. This role involves a combination of traditional ASIC/SoC physical design skills, packaging, power, clock and cooling analysis. You will work closely with the architecture and RTL team to do R&D on novel concepts for 3D integration. Skills and Qualifications Required: - 10+ years of physical design/verification experience. - Strong knowledge of block level and full-chip physical verification methodology. - Strong background in block physical design, Synthesis, PDV and IR. - Expert at optimizing for the best power/performance and area. - Experience with the complete physical design flow. Knowledge of Synopsys tool suite is a plus. - Expert with ICV or Calibre tools resolving block and full-chip DRC and LVS issues. - Expert with IR/EM analysis and resolution. - Strong ability in scripting languages like Tcl and Python. Ability to make flow enhancements. - Demonstrated ability to work with RTL teams to optimize for physical design. - Should demonstrate ownership, deep dive and should demonstrate strong fundamental understanding of PD concepts. - Knowledge of 2.5D or 3D packaging solutions. Preferred:

Department: Hardware Departments; Team: Silicon