Primary record

Physical Design Engineer (Bengaluru)

Cerebras Indexed employerIndia Office
Source-hosted applyChecked 2h agoFull-Time
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Workplace

On-site

Employment

Full-Time

Published

May 6, 2026

Closes

No date supplied

The role

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. Cerebras works with the leading model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership https://openai.com/index/cerebras-partnership/ with Cerebras, to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. About The Role As our team grows Cerebras is looking for a world class physical design engineer. We are looking for a strong learner who can learn how we do PD and integration of our wafer scale design. As a member of our tight knit physical design team, you will perform a variety of physical design tasks such as synthesis, place and route, timing and block closure / sign off. You will be involved in all aspects of physical design and implementation. You will work closely with the RTL team and with full-chip integration of these blocks. Skills and Qualifications: - 7+ years of physical design/verification experience. - Strong experience in block/subsystem timing closure. - Strong ability to learn and grow with the team. - Strong knowledge of block level and full-chip physical verification methodology. - Expert at optimizing for the best power/performance and area. - Experience with block physical design, PDV and IR. - Expert with ICV or Calibre tools resolving block and full-chip DRC and LVS issues. - Expert with IR/EM analysis and resolution. - Good understanding of full chip floor-planning and integration. - Strong ability in scripting languages like Tcl and Python. Ability to make flow enhancements. - Demonstrated ability to work w

Requirements

Department: Hardware Departments; Team: Silicon